Since the invention of the integrated circuit (IC), semiconductor chip features have become exponentially smaller and the number of transistors per device exponentially larger. Advanced IC's with hundreds of millions of transistors at feature sizes of 0.25 micron, 0.18 micron, 0.10 micron, and less are becoming routine. Improvement in overlay tolerances in optical photolithography, and the introduction of new light sources with progressively shorter wavelengths, have allowed optical steppers to significantly reduce the resolution limit for semiconductor fabrication far beyond one micron. To continue to make chip features smaller, and increase the transistor density of semiconductor devices, IC's have begun to be manufactured that have features smaller than the lithographic wavelength.
Sub-wavelength lithography, however, places large burdens on optical lithographic processes. Resolution of anything smaller than a wavelength is generally quite difficult. Pattern fidelity can deteriorate dramatically in sub-wavelength lithography. Critical dimensions (CD's), which are the geometries and spacings used to monitor the pattern size and ensure that it is within the customer's specification, are especially important to have size maintenance during processing. Semiconductor features may deviate significantly in size and shape from the ideal pattern drawn by the circuit designer.
Among various resolution-enhancement technologies (RET's) that have been developed in recent decades, alternating phase shift masks (alt-PSM) have provided improved image contrast and lithographic resolution over standard binary masks and attenuated PSM's, due to their strong imaging enhancement and low mask error functions (MEF's). An alt-PSM employs alternating areas of chrome and 180 degree-shifted quartz to form features on the wafer, but must be accompanied by a second, trim mask. The conventional double exposure alt-PSM process thus utilizes a dark field alt-PSM in the first exposure, and a binary trim mask in the second exposure. However, the binary trim mask is ill suited for the smaller dimensions of field polysilicon patterns.
A limited solution is to use an attenuated PSM as the trim mask. An attenuated PSM forms patterns through adjacent areas of quartz, and a low-transmission material such as molybdenum silicide (MoSi). Unlike chrome, MoSi allows a small percentage of the light to pass through, such as 4%, 6%, 18%, and so on. The thickness of the MoSi is usually chosen so the light that does pass through is 180 degrees out of phase with the light that passes through the neighboring clear quartz areas. However, although the attenuated PSM enhances image resolution and the performance of field polysilicon patterns, it negatively affects the critical dimensions of polysilicon gate patterns.
Therefore, there is a need for an improved double exposure alt-PSM process. Such an improved double exposure alt-PSM process should overcome the disadvantages associated with using a binary trim mask in the second exposure of the process, as well as should overcome the disadvantages associated with using an attenuated PSM in the second exposure of the process. For these and other reasons, there is a need for the present invention.